New Cascaded Multilevel Inverter With Reduced Power Electronic Components

Authors

  • E. Babaei Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran.
  • F. Masoudina Department of Electrical Engineering, Shabestar Branch, Islamic Azad University, Shabestar, Iran.
  • H. Alipour Department of Electrical Engineering, Shabestar Branch, Islamic Azad University, Shabestar, Iran.
  • M. Sabahi Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran.
Abstract:

In this paper, a new structure for cascade multilevel inverter is presented which consists of a series connection of several sub-multilevel units. Each sub-multilevel unit comprises of eight unidirectional switches, two bidirectional switches, and six DC voltage sources. For the proposed cascade topology, two algorithms are presented to produce all possible levels at the output voltage waveform. The required analysis of the voltage rating on the switches is provided. In order to verify the performance of the proposed inverter, the experimental results for a 15-level inverter are provided. The experimented 15-level inverter is compared with the other presented inverters in literature in terms of the number of DC voltage sources, switches, drivers, and blocked voltage by switches. The results of comparisons indicate that the experimented 15-level inverter requires lower power electronic elements. Moreover, the blocked voltage on the switches of the proposed topology is less than other topologies.

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Journal title

volume 16  issue 1

pages  107- 113

publication date 2020-03

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